LAB NOTEBOOK / 01RP1 BOUNDED AUTONOMOUS ACQUISITION

EXPERIMENT / 3 OCTOBER 2026

RP1 bounded autonomous acquisition.

All 129 operations completed. Untriggered conditions retained no queue entries; single commands retained one each. Continuous acquisition retained one entry, then two. The multiple-entry criterion did not recur in both sets.

Question and rationale

The compact command investigation established recurring command-associated responses with local observations separated by microseconds. This experiment asks whether one initiating command can sustain acquisition without further CPU access to the ADC, and whether the resulting queue can be stopped, recovered and left empty.

The bounded capability is component-local acquisition under SEIGRASM control. It advances the control and observation work required for physical Seigsit development. Register values and queued entries do not establish a physical Seigsit or a six-state transport.

Method

Retain the established root route, RP1 identity, clock admission and internal input 4. Require initially disabled ADC controls, empty disabled FIFO, zero divider and disabled interrupt controls. Repeat admission after one millisecond. Enable the input and converter, require READY and CS=0x4103, then set ADC DIV=0x00ffff00 and FCS=0x5. Queueing and per-entry error reporting are enabled; DMA requests and value shifting remain disabled.

Run two fixed-order sets of untriggered, single-command and continuous acquisition. Every condition has a requested two-millisecond interval using only the CPU counter. The untriggered condition reads CS without writing it. The single-command condition requires CS=0x4103 and writes 0x4007 once. The continuous condition requires the same prior CS and writes 0x400b once.

After the interval, select 0x4003 to stop repeated acquisition, omitting an already-satisfied write. Poll for READY set and both start fields clear, with a ten-millisecond deadline; retain FCS, RESULT and CS. This compact sequence makes no SD call. Persist its report, recover up to sixteen queued entries, persist that recovery, then execute another counter-only two-millisecond wait before reading FCS, RESULT and CS again.

Read FCS before each FIFO consumption; consume only while EMPTY is clear. Retain every raw entry and a counter after consumption, including equal values and errors. Sixteen is the report capacity, not an inferred physical queue depth. An admission check after each condition requires an empty queue, clear errors, the selected input/divider and disabled interrupt controls. Completed failure selects staged ADC and clock cleanup.

Assessment criteria

The frozen comparison asks for zero entries in each untriggered condition, one in each single-command condition and at least two after each continuous-start command, with an empty stopped queue and no observed queue or entry error. These are assessment criteria; the native sequence records different counts without substituting an expected result.

Execution and comparison have separate outcomes. All operations and recording checks can complete even when the multiple-entry criterion is not met. Two sets in one boot provide a local comparison; they do not establish recurrence across boots, exclusive component ownership or independently identified analog conversions.

Preparation and implementation

Candidate DF24CBE2C084 appends fifty literal AArch64 words at byte offset 1828 of the existing SEIGRASM RP1 source. Prior opcode words and the other seven target instruction sources remain unchanged. The recovery entry records status, consumed count, CS, final FCS, frequency, start/end counters and sixteen bounded triples of pre-read FCS, raw FIFO value and post-read counter. Unused report cells are cleared. Section 6 extends the journal with this report; compact access groups retain their existing format.

Thirty-eight supplied-response instruction checks passed before installation. They exercise queue bounds, rejected controls, equal entries, errors, overflow, ignored commands/stops, completion after a stop request, restoration and the complete native journal. Both full installation readbacks matched. The frozen protocol declares one two-minute powered run, 129 operations, at most 519 records, four initiating commands and at most seventeen ADC-register writes.

The target consists of authored SEIGRASM instructions; PC tools package and independently assess them. Existing ROM/EEPROM entry, AArch64 execution and counter, SD and PCIe interfaces, retained bridge setup and existing RP1 firmware remain apparatus dependencies. No firmware service is called by the acquisition sequence. These retained dependencies remain distinct from the intended sovereignty of the completed system.

Results

All 519 records and 129 operations were recovered with accepted execution. All six conditions, their queue recoveries, later stopped observations and restoration completed. The comparison criterion was not met in the first continuous condition, which retained one entry; the second retained two.

Queue observations in execution order; values are raw codes
ConditionEntriesRecovered valuesFCS after stopLater queue
Untriggered 10—0x105Empty
Single command 118620x10005Empty
Continuous 118580x10005Empty
Untriggered 20—0x105Empty
Single command 218560x10005Empty
Continuous 22856, 8550x20005Empty

Both continuous-start writes immediately read back 0x410b: continuous-start and READY were both asserted at those sampled instants. Each explicit stop changed CS from 0x410b to 0x4103 with one write. The subsequent readiness check returned 0x4103 on its first read in every condition. READY alone therefore did not distinguish stopped acquisition from enabled continuous acquisition. The implemented stop criterion also requires both start fields clear.

The two single commands immediately read back 0x4003, retaining the earlier command-associated READY-low observation. They had completed by the end of their waits, so no stop write was needed. The untriggered conditions issued neither a conversion command nor a stop write.

Recovered occupancy agreed with the earlier post-stop FCS. In Continuous 2, FCS decreased from 0x20005 to 0x10005 before the two consumptions, then reached empty 0x105. All six recoveries ended empty; all six later observations still reported empty, stopped-ready CS and unchanged RESULT. No sampled overflow, underflow, converter error or per-entry error was present. Cleanup found no remaining queue entries.

Timing and retained data

The reported counter frequency was 54 MHz. Acquisition waits spanned 108,013–108,028 ticks, or 2,000.241–2,000.519 microseconds. The continuous conditions had nearly identical initiating-routine-end to stop-routine-start brackets: 108,166 and 108,168 ticks, or 2,003.074 and 2,003.111 microseconds. Their one-versus-two entry difference cannot be attributed to a substantially shorter measured software window.

Recorded timing; milliseconds except the acquisition wait
ConditionWait, µsStop to recoveryRecovery to later empty observation
Untriggered 12000.519503.149312.495
Single command 12000.241503.426311.801
Continuous 12000.278503.441310.924
Untriggered 22000.259501.905310.850
Single command 22000.370501.808311.367
Continuous 22000.296503.769312.069

SD persistence separated stopping from recovery by 501.808–503.769 ms. The queued occupancy survived to the later drain. After recovery, the queue was again observed empty 310.850–312.495 ms later, including persistence and the requested stopped wait. These are endpoint observations, not continuous surveillance of the queue or a general retention lifetime measurement.

The coordinator spanned 1,100,009,026 ticks, 20.370538 seconds, from entry to terminal snapshot. This excludes boot-loader time and persistence of the terminal record. The powered interval itself was not independently measured.

Restoration and surrounding controls

ADC control was restored to zero at operation 114; queue control was cleared at 115, leaving the EMPTY indication 0x100; the pacing divider was restored to zero at 116. Clock control was restored to zero at 123. Each restoration wrote once, returned an accepted readback and was followed by accepted final checks.

All six surrounding controls matched before and after acquisition: root link 0x0003e0b0, root command 0x00100002, RP1 identity 0x20001927, enabled clock CTRL 0x10000800, clock DIV=1 and SEL=1. Every post-condition admission passed.

Recording integrity

Two read-only 64 MiB captures matched. Independent reconstruction verified raw sector identity, CRC and complement, senary fields, ordinals, operation boundaries, consumed counts, queue triples and terminal counts. All 32,185 unused journal reservations matched preparation. The partition table, executable and boot configuration were unchanged.

Seven other boot-volume sectors differed and a System Volume Information directory was present; writer and timing remain unestablished. The acquisition tool made no SD write. A terminal record cannot establish its own target readback. Missing observations remain unavailable rather than being inferred as zero or empty.

Interpretation and next investigation

The second continuous-start command was associated with two retained entries after one initiating write. The zero-entry controls and one-entry single commands provide the intended local contrast. Explicit stopping, bounded recovery and later empty observations completed in both sets. The first continuous condition retained only one entry, so recurrence of the multiple-entry criterion remains unresolved.

Inference: start phase, first-result latency or divider behavior could make a fixed two-millisecond interval contain different numbers of completions. The existing records do not locate those completion instants. Their counter brackets concern software accesses, not the ADC's internal clock; exact cadence cannot be derived by dividing two milliseconds by the recovered count. Other component activity also remains unexcluded.

Next investigation: vary the counter-only acquisition window under the same divider and input, with untriggered and single-command controls. Bracket initial occupancy and the stop boundary, preserving queued values and errors. A duration-versus-count comparison can distinguish a short-window boundary or phase effect from failure to sustain acquisition. It needs bounded windows, declared handling of overflow and a new frozen protocol; simply repeating the present duration would add less information.

This establishes a bounded component-control result on this apparatus. It does not independently identify analog conversions, calibrate the input, replace firmware or demonstrate physical Seigsit transfer. The earlier PMIC exceptions remain a separate measurement question.

Evidence and provenance

Preparation identity: df24cbe2c0843cbec582b0009983c5f6aa8828bd4401fbb2626192b7a3466956. Returned capture SHA-256: 7ea2b3cb3bbcd332af19902106e84154936885f3a41e3f9742dbb343b942d9f1.

Forty independent return checks cover all eight preserved RP1 returns. This return adds reconstruction of every queue report, the unequal continuous counts, observed READY during continuous mode, restoration and missing-report rejection. The legacy section-3 trial counter remains zero; these six conditions are represented by compact groups and queue recoveries.