RP1 acquisition windows and command timing.

Question and rationale

The preceding autonomous-acquisition run retained one then two entries after continuous-start commands with nearly equal two-millisecond windows. Both untriggered controls stayed empty and both single commands retained one entry. The remaining question was how acquisition begins and progresses relative to the command, the wait and the stop boundary.

This experiment varies duration and pre-command timing, reverses the order, and adds queue observations immediately after the action and before stopping. It tests component-local progress and controlled recovery needed for physical Seigsit development. The existing register and SD transports remain apparatus dependencies.

Method

Retain the established route, component identity, clock admission, internal input 4, ADC DIV=0x00ffff00 and FCS=0x5. Require the admitted controls and an empty queue before each condition. Compare requested acquisition windows of 0.5, 1, 2 and 4 ms, each with zero or 0.5 ms added before the command.

Block 1 begins with an untriggered four-millisecond control, then runs the eight continuous combinations in ascending duration order, and ends with a single-command control. Block 2 begins with the single-command control, reverses the eight combinations and ends with the untriggered control. Both single-command controls use four-millisecond windows. There are sixteen continuous conditions and four controls in one boot.

Each compact group reads initial CS, FCS and RESULT; executes the pre-command counter wait; issues one guarded start command or reads untriggered CS; reads immediate FCS; executes the acquisition counter wait; reads FCS and CS before stopping; requests stopped controls and polls for READY with both start fields clear; then reads FCS, RESULT and CS. No ADC or SD access occurs inside either counter-only wait, and no SD call occurs inside the fourteen-access group.

After stopping, persist the compact report and recover at most sixteen queue entries, retaining raw values, errors, pre-consumption FCS and counters. Persist that recovery, wait another two milliseconds and observe the queue and controls again. Admission failure ends further conditions and selects staged cleanup. Overflow limits counts to the retained subset; it is not discarded or retried. The added pre-command delay changes command timing without establishing the ADC's internal phase.

Assessment criteria

The frozen assessment separates complete controlled execution from the duration-dependent outcome. Controls and recovery require complete accepted execution, zero entries after no command, one after a single command, empty stopped queues and no observed recovery error. Continuous counts remain measured outcomes: a short window need not contain two entries.

Compare counts by duration separately for each delay and block, then inspect delay and order differences. Inspect initial, immediate, pre-stop, post-stop and recovery queue observations together. Growth between the shortest and longest windows supports continuing acquisition after one start. It does not identify the first completion time, establish exact cadence, independently identify analog conversions or demonstrate physical Seigsit transport.

Preparation and implementation

Candidate 10AE18534EBA retains the literal opcode bytes of all eight target SEIGRASM sources from DF24CBE2C084. Its bounded operation data adds the duration/delay schedule and boundary observations; the PC reader adds their comparisons. The native entry, coordinator, register access, compact grouping, bounded queue recovery and recording execute the experiment.

Fourteen instruction checks passed with supplied command-reset and free-running timing responses, including complete recording, in-flight completion, ignored stopping, errors, overflow and restoration. Both installation readbacks matched. The frozen protocol declares 185 operations, at most 1,033 records, eighteen initiating commands and one two-minute powered run. Existing ROM/EEPROM entry, AArch64 execution and counter, SD, PCIe/RP1 interfaces and existing component firmware state remain dependencies; no firmware service is called by the acquisition sequence.

Results

All 1,033 records and 185 operations were recovered with accepted execution. Every four-millisecond continuous condition retained three entries after one initiating command. Both no-command controls retained zero entries; both single-command controls retained one. All twenty recoveries, later empty observations and restoration checks completed without observed errors.

The longest window retained more entries than the shortest in all four block/delay comparisons. Counts were nondecreasing with duration in three comparisons. Block 2 with zero added delay gave 1, 0, 1, 3, so a strictly monotonic response was not established. The pre-command delay made no count difference in Block 1; in Block 2, the added-delay conditions retained one more entry at 1 and 2 ms. These differences do not establish a reproducible delay effect.

Recovered codes ranged from 853 to 859. Equal codes remained separate queue entries: one four-millisecond condition returned 854, 854, 854. The raw-code drift is an observation; no calibrated temperature, voltage or cause is inferred.

Start and stop boundaries

Every condition began with empty FCS=0x105. All sixteen continuous conditions still reported empty immediately after their start command. Both single commands already reported one entry at that next FCS read, although their immediate command readbacks had CS=0x4003.

Every continuous command read back CS=0x410b, and every pre-stop CS observation retained that value: READY was set alongside continuous-start. Each explicit stop wrote once and returned 0x4103; the subsequent readiness poll completed on its first read. The four controls needed no stop write.

Pre-stop and post-stop FCS were equal in every condition. Each recovered count matched the observed occupancy, and recovery ended at empty 0x105. The observations therefore recorded no count increase across these stop boundaries. They do not exclude events between sampled accesses or establish that a stop can never coincide with a completion.

All later observations retained empty FCS, stopped-ready CS and unchanged RESULT. No sampled converter error, queue overflow, underflow or per-entry error was present. Final cleanup recovered zero remaining entries.

Measured timing

The recorded counter frequency was 54 MHz. Requested waits and measured intervals are kept separate from persistence gaps.

Zero added delay still incurred 0.648–0.685 microseconds in the counter-wait operation. The requested 500-microsecond pre-command waits measured 500.222–500.407 microseconds. The two-millisecond action-to-stop brackets are about eight microseconds longer than the preceding experiment's brackets because this sequence includes additional queue/control observations. Comparisons between boots therefore include an instrumentation change.

Stopping preceded queue recovery by 656.177–659.532 ms, including SD persistence. The later empty observation followed recovery by 310.771–319.287 ms, again including persistence and the stopped wait. Queued occupancy survived to the drain; these endpoint observations do not provide continuous queue surveillance.

The coordinator interval was 2,177,867,623 ticks, 40.330882 seconds. It excludes boot-loader time and persistence of the terminal record. The powered interval itself was not independently measured.

Restoration and recording integrity

ADC control, queue control, pacing divider and clock control were each restored with one accepted write. Final FCS retained only EMPTY=0x100. All post-condition admissions and final checks passed. Root link, root command, RP1 identity and all three surrounding clock fields matched their pre-acquisition observations.

Two read-only 64 MiB captures matched. Independent reconstruction verified record identity, CRC and complement, senary fields, ordinals, compact reports, queue recoveries and terminal counts. All 31,671 unused journal reservations matched preparation. The partition table, executable and boot configuration were unchanged.

Seven other boot-volume sectors differed and a System Volume Information directory was present; writer and timing remain unestablished. The acquisition tool made no SD write. A terminal record does not independently establish its own target readback.

Interpretation and next investigation

One continuous-start command was followed by three retained entries in all four four-millisecond conditions. Their immediate post-command queues were empty, their later pre-stop queues contained three entries, and the controlled stop preserved those entries for recovery. Together with the no-command and single-command controls, this supports continuing component-local acquisition during the counter-only observation window on this apparatus.

The short-window differences remain unresolved. Inference: variable first-entry latency or an unsynchronized acquisition phase could produce different counts in equal windows. Order-dependent changes or other component activity remain alternatives. No first-entry instant or internal divider phase was recorded, so the present counts cannot select between these explanations or determine an exact acquisition cadence.

Next investigation: add bounded native timestamps for the first nonempty queue and subsequent occupancy changes after one start. Retain a quiet four-millisecond condition to compare with the added observation traffic, then stop and recover the complete queue. This would measure the currently missing timing relation directly and distinguish first-entry delay from later spacing. Polling itself must remain an explicit experimental factor.

This result supports a usable acquisition-and-retention capability for further development. It does not independently establish analog freshness, exclusive ownership, calibrated physical states, firmware replacement or physical Seigsit creation/transfer. Earlier PMIC exceptions remain a separate measurement question.

Evidence and provenance

Preparation identity: 10ae18534eba8ef1f17bdb74bacb1685ff6e9cdb99ede21af2fdea741bf4d365. Returned capture SHA-256: cb05d913a09b8cc384ebdc9bd57df0aca7c3358235e3b74a1d15317c64d05713.

Forty-seven return checks cover the preserved RP1 records, including this run's complete raw-sector reconstruction, all twenty counts and stop boundaries, timing, restoration, missing-report handling and altered-command rejection. Preparation checks and physical observations retain their separate evidential roles.