LAB NOTEBOOK / 01RP1 SINGLE CONVERSION

EXPERIMENT / 3 OCTOBER 2026

RP1 single conversion.

One conversion request was followed by READY clear, then READY asserted and a changed result. All 110 operations and both restorations completed.

Question and rationale

The clocked-access experiment recovered a zero ADC control/status response and completed clock restoration without requesting a conversion. This investigation tests whether the accessible block responds to converter enable and one internal-input conversion request, while its configuration, surrounding controls and recording path remain usable.

Direct, observable component operation is a prerequisite for investigating the electrical creation and use of Seigsits. This experiment advances that control path; physical Seigsit creation, six-state transport and Hyphos bootstrap require further implementation and evidence.

Method

Retain route admission and clock enable. Snapshot ADC CS, RESULT, FCS, DIV, INTE and INTF. Require disabled converter controls, an empty disabled FIFO, zero divider and no enabled or forced interrupts. Repeat admission after a one-millisecond minimum wait.

Select internal temperature input 4 and enable the converter through a guarded CS write of 0x4003. Require READY and the declared configuration. Read RESULT twice without requesting a conversion, with a minimum wait and CS observation between them. Operation 78 requires CS 0x4103, writes 0x4007 exactly once and preserves immediate readback. A later poll requires READY asserted and START_ONCE clear, with a ten-millisecond deadline. Record CS, RESULT and the remaining ADC controls before assessing errors.

Observe root link, root command, RP1 identity and clock CTRL/DIV/SEL before and after the ADC sequence. Restore ADC controls first, then clock enable. Every operation has persisted intent, report and completion; separate SD operations therefore contribute to the intervals between observations. The complete schedule contains 110 operations and at most 343 journal sectors.

Assessment criteria

Evaluate admission, enable, command issuance, readiness, raw result and both restorations separately. Sequence acceptance requires the declared configuration and readiness checks. Result magnitude, change and documented range are separate observations. Missing data remains unavailable; zero is retained as a valid observed value. Neither an equal result nor a changed result alone establishes conversion freshness. No calibrated voltage or temperature is inferred.

Preparation and implementation

Candidate 47F0C95BB4F1 adds guarded one-command access kind 6 and staged ADC/clock cleanup to literal SEIGRASM instructions. Kind 6 records its precondition, exact write and immediate response, without retrying or requiring self-clearing fields to remain asserted. Coordinator protocol 3 selects clock-only cleanup before ADC modification and ADC-then-clock cleanup afterward. The other six target instruction sources remain unchanged.

Twenty-four supplied-response checks qualified the sequence, including command refusal, fast completion, an ignored command, unchanged results, missing readiness, errors and recording loss. The qualification record preserves the full run, focused entry-stage assertion retest and executable equivalence checks. Both complete installation readbacks matched. The frozen protocol specifies one two-minute powered run.

PC tooling packages authored instruction words and fixed operation data. Existing ROM/EEPROM entry, AArch64 execution and counter, SD and PCIe transport, retained bridge configuration and existing RP1 firmware remain apparatus dependencies. No firmware service, PMIC operation, external-pin action, FIFO access or continuous-conversion request is scheduled.

Results

All 343 consecutive records and 110 operations were recovered with accepted completion. Initial CS and RESULT were zero; FCS was 0x0100; DIV, INTE and INTF were zero. Converter enable wrote 0x4003 and returned 0x4103. Both subsequent untriggered RESULT observations remained zero.

Recorded conversion and restoration sequence
OperationRequested actionRecovered response
71: converter enableOne write: 0x4003CS 0x0000 → 0x4103
74, 77: untriggered readsNo conversion requestRESULT zero at both observations
78: single commandOne write: 0x4007CS 0x4103 → 0x4003; READY clear
79: readiness checkOne read; no writeCS 0x4103; READY asserted, START_ONCE clear
81: result readOne read; no writeRESULT 0x035d, decimal 861
98: ADC restorationOne write: zeroCS zero immediately and at the later read
104: clock restorationOne write: zeroCTRL zero immediately and at the later read

START_ONCE was already clear in the immediate command response; its asserted state was not captured. READY was clear in that response and asserted at the later poll. Subsequent ADC controls matched the declared enabled configuration without recorded error flags. All six surrounding controls were unchanged: root link 0x0003e0b0, root command 0x00100002, RP1 identity 0x20001927, clock CTRL 0x10000800, DIV=1 and SEL=1. Final restoration checks passed.

Timing and observation gaps

The command routine spanned 89 ticks at the recorded 54 MHz counter frequency, approximately 1.65 microseconds. The later readiness check began 6,253,157 ticks, 115.799 milliseconds, after that routine ended. RESULT was read 18,760,846 ticks, 347.423 milliseconds, after the command routine. Recording and intervening operations contribute to these gaps; they are not measured conversion durations.

The two untriggered RESULT reads were separated by 348.432 milliseconds from the first routine end to the second routine start. The coordinator recorded 730,173,039 ticks, 13.521723 seconds, from entry to its terminal snapshot. This excludes boot-loader time and the final record write/readback. Exact powered duration was not independently measured.

Recording integrity

Two complete read-only 64 MiB captures matched. Independent raw-sector reconstruction checked identity, checksums, senary fields, ordinals, command and result reports, completion records and terminal counts. All 32,361 unused journal reservations matched preparation. The partition table, executable and boot configuration were unchanged.

Seven other boot-volume sectors differed and a System Volume Information directory was present. Their writer and timing remain unestablished. The acquisition tool performed no SD write. The terminal record cannot establish its own target readback.

Interpretation and next investigation

The recovered sequence supports a command-associated converter response: untriggered RESULT remained zero, READY cleared immediately after the one recorded command, READY was later asserted, and RESULT then held 861. Component access and both restorations remained usable. This is stronger evidence than the preceding control/status read alone.

The result is a raw code from the selected internal input. It is not a calibrated temperature or voltage, and it does not measure the node used in the earlier PMIC experiments. One command cannot establish repeatability, independent analog freshness, exclusive ownership or absence of other firmware activity. It does not establish physical Seigsit transport.

Next investigation: perform a bounded sequence of untriggered observations and single commands, retaining request, readiness and result observations together in native memory before persisting each sequence. Preserve the first and last readiness observations, poll count, counter brackets, raw results, every timeout and restoration. This removes SD persistence from the command-to-observation interval and tests recurrence and command dependence directly. Equal values remain valid; variation is not a freshness criterion. Firmware replacement and the six-state physical relation remain separate requirements.

Evidence and provenance

Preparation identity: 47f0c95bb4f1cc436f3e702a4032a54113a23993b930332c7f5936105ddaa493. Returned capture SHA-256: 79239cb60ee01fd9639ac181f76c31b9b25e99cf207111dfa646aff9782d9e36.

Twenty-nine return-analysis checks cover six preserved RP1 returns. The new checks reconstruct the raw command and result, preserve timing and restoration, reject an altered command guard and distinguish a missing command report from a completed command. The legacy section-3 acquisition-trial count is zero; this protocol records its single request separately in the conversion observations.